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74112 Dual J-K Negative Edge Triggered Flip-Flop IC
Rs. 35.00
Rs. 95.00
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- Dual JK Negative Edge Triggered Flip-Flops With Preset and Clear
- High-level input voltage: 2V
- Low-level input voltage: 0.8V
- High-level output current: -0.4mA
- Low-level output current: 8mA
- Maximum clock frequency: 45MHz
- Propagation delay time: 20ns
- Supply voltage range: 4.75 to 5.25V
- Package: DIP-16
The SN74LS112AN is a dual J-K Negative-Edge-Triggered Flip-Flop with clear and preset. When preset and clear are inactive (high), data at the J and K inputs meeting the setup time requirements are transferred to the outputs on the negative-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. This versatile flip-flop can perform as toggle flip-flop by tying J and K high. The SN74S112A is characterized for operation from 0 to 70°C.
- Shipping Time:- Our orders are shipped within 24 Hours.
- Delivery Time:- 2-5 Days (Anywhere in India), 7-10 Days for remote location
- Shipping Partner:- Bluedart, Amazon Shipping, Ekart Logistics, Delhivery & India Post.
- Replacement:- Damaged During Transit, Missing Parts Or Item Mismatch.
- Return:- Item mismatch or parts missing etc.
- No return/Replacement will apply if the Product has been subject to misuse, static discharge, neglect, accident, modification, or has been soldered or altered in any way.
- We accept no responsibility for improper installation of our products. Electrical polarity must be properly observed in hooking up electrical components.